MESFETS are characterized by a metal gate in contact with a channel region. In particular, in a VLSI environment, conventional MESFET's suffer from relative device gain degradation due to series resistances which can only be improved to a limited degree by an advanced pattern reproduction alignment process which is relatively very costly and complicated.
As such, there exists a need for a process that will efficiently fabricate MESFET's in an VSLSI environment using a conventional photolithgraphic process.